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A generic functional coverage solution based on vmm_notify
Posted on Monday, June 15, 2009 - 03:05 by Wei-Hua Han from the site Verification Martial Arts
Weihua Han, CAE, Synopsys Functional coverage plays an essential role in Coverage Driven Verification. In this blog, I’ll explain a modular way of modeling and implementing  functional coverage models. SystemVerilog users can take the advantage of  the “covergroup” construct to implement functional coverage. However this is not enough.
Wei-Hua Han
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VMM VIP’s on multiple buses
Posted on Wednesday, May 27, 2009 - 09:09 by Adiel Khan from the site Verification Martial Arts
Adiel Khan, Synopsys CAE Increasingly, more design-oriented engineers are writing VMM code. Some are trying to map typically good design architecture practices to verification development. A dangerous mapping is parameterization, from modules to classes. In my old Verilog testbenches I would develop reusable modules and use #parameters extensively to control the settings of the modules I was instantiating. (It was a sad day when I heard IEEE was deprecating my friend the defparam). 1.
Adiel Khan
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Be careful what you wish for!
Posted on Tuesday, June 10, 2008 - 11:45 by janick from the site Verification Martial Arts
Now that VMM is available under an Open Source license, how is it going to be supported? First of all, any further bug fixes and enhancements we will be making to VMM (such as the newly announced VMM-for-Low-Power functionality) will be added to the Open Source distribution once the usage model and basic functionality will have been proven with one or two lead customers who work with us in specifying and developing the enhancements. The Apache licensing means that you are free to modify the VMM code in any way you wish. But should you?
janick
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