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Transition delay

Fixing Transition Violation
Posted on Monday, January 10, 2011 - 02:10 by Murali from the site ASIC-System On Chip (SoC)-VLSI Design
Transition violations can be fixed by different methods based on the design situations.  They include:  Up sizing the driver cell  Decreasing the net length by moving cells nearer or reducing long routed net  By adding buffers  By using existing spare cells as buffers  By splitting loads through buffers to reduce the fan out number (number of driven cells)    First we need to analyze the root causes of violations.
Murali
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Transition Delay and Propagation Delay
Posted on Tuesday, December 16, 2008 - 00:47 by  from the site ASIC-System On Chip (SoC)-VLSI Design
Transition Delay Transition delay or slew is defined as the time taken by signal to rise from 10 %( 20%) to the 90 %( 80%) of its maximum value. This is known as “rise time”. Transition Delay or Slew Similarly “fall time” can be defined as the time taken by a signal to fall from 90 %( 80%) to the 10 %( 20%) of its maximum value. Transition is the time it takes for the pin to change state. Setting Transition Time Constraints The above theoretical definitions are to be applied on practical designs.
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