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An ASIC Guy Visits An FPGA World - Part II
Posted on Monday, June 22, 2009 - 02:07 by harry from the site harry ... the ASIC guy
I mentioned a few weeks ago that I am wrapping up a project with one of my clients and beating the bushes for another project to take its place. As part of my search, I visited a former colleague who works at a small company in Southern California. This company designs a variety of products that utilize FPGAs exclusively (no ASICs), so I got a chance to understand a little bit more about the differences between ASIC and FPGA design.
harry
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Setting The Record Straight
Posted on Thursday, February 19, 2009 - 02:50 by harry from the site harry ... the ASIC guy
Since conducting the Verification Methodology Poll and publishing the raw results last week, I’ve been planning to follow up with a post that digs a little deeper into the numbers. Things have gotten rather busy in the meantime, both at work and with organizing the SaaS and Cloud Computing EDA Roundtable for next week at DVCon. So I’ve let it slip a little. Well, I noticed today that the verification methodology poll was referenced in a Cadence blog post by Adam Sherer.
harry
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DVCon Survey Results - What Do They Mean?
Posted on Tuesday, January 27, 2009 - 16:49 by harry from the site harry ... the ASIC guy
I came across some interesting survey results from the 2007 and 2008 DVCon. Keep in mind, like with any survey, results are skewed based on attendees, which tend to be verification engineers who tend to be using the more advanced methods than the general population.
harry
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