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verification

Posted on  by  from the site harry ... the ASIC guy
761 days. That’s 2 years, 1 month, and 3 days. 761 days ago, I hosted a small group of interested EDA folks, journalists, and bloggers in a small room in the Doubletree hotel after one of the evenings after DVCon. Most of the discussion that year was around OVM and VMM and which methodology was going to win out and which was really open and which simulator supported more of the System-Verilog language. Well, all that is put to bed.
harry
Posted on  by  from the site harry ... the ASIC guy
Engineers tend to view the world in binary. There’s the good guys and the bad guys. There’s the right way and the wrong way. There are rich folks and poor folks. Democrats and Republicans. You’re with us or against us. And there are winners and losers. This week, working the Agnisys booth at DVCon, I got to see all these types and all the shades in between. I got to see the good guys (me, of course, and anyone who was with me) and the bad guys (the competition).
harry
Posted on  by  from the site harry ... the ASIC guy
Although I was unable to attend DVCon last week, and I missed the Jim Hogan and Paul McLellan presenting “So you want to start an EDA Company? Here’s how“, I was at least able to sit in on an interesting webinar offered by RTM Consulting entitled Achieving Breakthrough Customer Satisfaction through Project Excellence. As you may recall, I wrote a previous blog post about a Consulting Soft Skills training curriculum developed by RTM in conjunction with Mentor Graphics for their consulting organization.
harry
Posted on  by  from the site harry ... the ASIC guy
www.flickr.com/photos/cayusa/ CC BY-NC 2.0 In the almost 2 years since I started this blog, I’ve been paying pretty close attention to the EDA industry. And one of the themes I keep hearing goes something like this: “There’s no more innovation in EDA” I hear it on blogs and on Twitter. I hear it from design engineers, from consultants, from old media, from new media, and even from EDA people. One person I know, someone who has been an executive at an EDA company and a venture capitalist, says that EDA is persona non-grata for VC folks.
harry
Posted on  by  from the site harry ... the ASIC guy
I mentioned a few weeks ago that I am wrapping up a project with one of my clients and beating the bushes for another project to take its place. As part of my search, I visited a former colleague who works at a small company in Southern California. This company designs a variety of products that utilize FPGAs exclusively (no ASICs), so I got a chance to understand a little bit more about the differences between ASIC and FPGA design.
harry
Posted on  by  from the site harry ... the ASIC guy
A colleague of mine, Alvin Cheung, recently interviewed Chris Schalick of GateRocket regarding his experiences in founding a high-tech startup company. That interview is reposted below by permission of both parties. __________ Chris Schalick is VP of Engineering, CTO, and Founder of GateRocket, Inc. After working in the ASIC and FPGA industry for more than 15 years, Chris founded the company to solve one of the fundamental problems with FPGA design, the ability to simulate hardware FPGA behavior within the design verification environment.
harry
Posted on  by  from the site harry ... the ASIC guy
Last Wednesday at DVCon, Peggy Aycinena MC’ed what used to be known as the Troublemakers Panel, formerly MC’ed by John Cooley. The topic, “EDA: Dead or Alive?” Well, having attended Aart’s Keynote address immediately preceding and having attended Peggy’s panel discussion, I can answer that question in the immortal words of Miracle Max, “EDA is only MOSTLY dead”.
harry
Posted on  by  from the site harry ... the ASIC guy
I’m still up at the Design Verification Conference (DVCon) and have not had a chance to summarize last evening’s Software-As-A-Service and Cloud Computing EDA Roundtable. I will do that over the weekend and have a complete rundown next week, including slides. In the meantime, I wanted to pass on some information that was announced a week or so ago and which I became aware of just this week. Mentor Graphics has initiated a Displaced Worker Program to provide free training to customers who have lost thier jobs in the last 6 months.
harry
Posted on  by  from the site harry ... the ASIC guy
Since conducting the Verification Methodology Poll and publishing the raw results last week, I’ve been planning to follow up with a post that digs a little deeper into the numbers. Things have gotten rather busy in the meantime, both at work and with organizing the SaaS and Cloud Computing EDA Roundtable for next week at DVCon. So I’ve let it slip a little. Well, I noticed today that the verification methodology poll was referenced in a Cadence blog post by Adam Sherer.
harry
Posted on  by  from the site harry ... the ASIC guy
I’ve been writing about Software-as-a-Service (SaaS) and Cloud Computing as relates to EDA for some time now. Then back in January I made a New Years resolution to organize a SaaS EDA roundtable at the 2009 Design and Verification Conference (DVCon).  About a month ago I asked for volunteers and several of you have stepped up to help. Now, just a week before DVCon, I’d like to formally announce the event. The SaaS and Cloud Computing Roundtable will be held from 6:30 - 8:00 pm on Wed Feb 25th in the Monterey/Carmel rooms at the San Jose Doubletree Hotel.
harry
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